OpenRISC SPI startup components

I found it very inconvenient to mess around with gdb or OpenOCD just to load and start linux kernel every time I need it, so I took ELF loader written in C, build somewhat minimal framwork for it and also created RAM module to hold loader code, data and stack.
In my system both FPGA bit stream and linux kernel are in SPI flash, bit stream is at the beginning of it and kernel is at 0x180000 offset. Kernel is plain vmlinux - uncompressed ELF.

dualport_bram.vhdl	dual port RAM module with byte selects for writes (it already contains compiled ELF loader code)
bram2_wb.vhdl	WishBone wrapper for RAM module
loader-1.0.tar.bz2	ELF loader sources

There are some requirements for OpenRISC SoC, it needs to have:

RAM, into which kernel will be placed

SPI at 0x9f000000, opencores simple-spi module for accessing SPI flash

UART at 0x90000000, opencores 16550A compatible UART, which is used to output messages from loader

This is how it looks like after powering up:

That's all for now :)

This page was last modified on 19 Jan 2017